Binary, BCD, and Johnson Counters Revision Notes | A Level AQA Physics

1. Why Counters Matter in Digital Electronics

Every digital system that tracks time, counts events, or steps through a sequence relies on a counter circuit. From the clock in a microprocessor to the display on a digital stopwatch, counters are the heartbeat of digital electronics.

At A Level, you need to understand three specific counter types: the binary counter, the BCD counter, and the Johnson counter. Each one counts differently, and choosing the right type for a given task is a genuine engineering decision — and a favourite exam topic.

2. The Binary Counter

Picture a row of light switches, each either on (1) or off (0). A binary counter works exactly like that row of switches, but they flip in a precise pattern on every clock pulse. Each switch is one flip-flop — a bistable circuit that stores a single binary digit and toggles its output when triggered.

For a 4-bit binary counter, four flip-flops are connected in series. The least significant bit (LSB) toggles on every clock pulse. The next bit toggles every two pulses, the next every four, and the most significant bit (MSB) toggles every eight pulses. This halving of toggle frequency at each stage is the key mechanism.

A 4-bit binary counter cycles through $2^4 = 16$ states: from 0000 (decimal 0) up to 1111 (decimal 15), then back to 0000. The number of states is always $2^n$ for $n$ flip-flops.

Notice the pattern: Bit 0 alternates every pulse, Bit 1 alternates every 2 pulses, Bit 2 every 4 pulses, and Bit 3 every 8 pulses. Each stage divides the clock frequency by 2, which is why binary counters are also called divide-by-2 chains.

The binary counter is the foundation for the other two counter types you need to know. Keep that 16-state sequence in mind — the BCD and Johnson counters are both modifications of this basic idea.

3. The BCD Counter

Here is the problem with a pure binary counter in a real-world display: humans read in decimal, not binary. If you want to drive a seven-segment display showing the digits 0 through 9, you need a counter that resets after state 9 (1001), not after state 15 (1111). That is precisely what a BCD counter does.

A BCD counter is built from the same four flip-flops as a binary counter, but with additional reset logic. When the counter reaches 1010 (decimal 10), a feedback circuit forces all flip-flops back to 0000 immediately. The counter never actually displays state 10 — the reset happens so fast it is invisible to the output.

The reset logic typically uses a NAND gate connected to the outputs that go high at state 1010. Specifically, Bit 3 and Bit 1 are both high at 1010 (and at no earlier state), so the NAND gate output drives the asynchronous clear inputs of all flip-flops back to zero.

The BCD counter is the building block of decimal counting systems. Chain two BCD counters together — one for units, one for tens — and you can count from 00 to 99. This is how digital clocks and frequency counters display decimal readings.

Now that you can contrast binary and BCD counters, there is a third type that works on a completely different principle — one that does not count in binary at all.

4. The Johnson Counter

Think of a shift register — a chain of flip-flops where each one passes its output to the next on every clock pulse. A Johnson counter is a shift register with a twist: the inverted output ($\overline{Q}$) of the last flip-flop feeds back to the data input (D) of the first flip-flop. This single modification creates a self-recycling sequence with a very useful property.

For a 4-stage Johnson counter, the sequence length is $2 \times 4 = 8$ states. Compare that with a 4-bit binary counter, which gives $2^4 = 16$ states, or a 4-bit ring counter (non-inverted feedback), which gives only 4 states. The Johnson counter sits between these extremes and offers a clean, glitch-free sequence.

Starting from the all-zeros state 0000, a 4-stage Johnson counter steps through the following sequence. At each clock pulse, every bit shifts one position to the right, and the new input bit is the complement of the previous last-stage output.

Notice the elegant pattern: the sequence fills with 1s from the left, then empties with 0s from the left. Each state differs from the previous state by exactly one bit changing, which means there are no glitches or transient invalid states during transitions — a significant practical advantage in hardware design.

The Johnson counter is not counting in binary. Its output states are not binary representations of 0, 1, 2, 3... — they are a unique cyclic code. This means you cannot read the output directly as a decimal or binary number without a decoder, but the clean single-bit transitions make it ideal for generating timing signals and control sequences.

5. Comparing the Three Counter Types

You have now seen all three counter types in action. Before the exam, you need to be able to compare them fluently — not just recall facts, but analyse trade-offs and justify choices for a given application.

The glitch issue with binary counters is worth understanding at A Level depth. When a binary counter transitions from 0111 to 1000, all four bits change simultaneously. In practice, flip-flops do not switch at exactly the same instant, so the output briefly passes through invalid intermediate states. The Johnson counter avoids this entirely because only one bit changes per clock pulse.

6. Worked Analysis: Tracing a Johnson Counter Sequence

Exam questions often give you a partial state table or timing diagram and ask you to complete it, or to identify which type of counter is shown. Here is how to work through that systematically.

Worked example: Completing a Johnson Counter State Table

A 3-stage Johnson counter starts in state Q2 Q1 Q0 = 000. Complete the full state sequence and state how many unique states the counter passes through before repeating.

1. New input to Q2 = $\overline{Q0}$ (complement of last stage output) — In a Johnson counter, the inverted output of the final flip-flop (Q0 here) feeds back to the input of the first flip-flop (Q2). This is the defining feature — confirm it before proceeding.
2. Current state: Q2=0, Q1=0, Q0=0. New input = NOT Q0 = NOT 0 = 1. After shift: Q2=1, Q1=0, Q0=0 → State: 100 — Each flip-flop takes the value of the one to its left. Q2 receives the new input bit (1), Q1 takes the old Q2 (0), Q0 takes the old Q1 (0).
3. Current state: 100. New input = NOT Q0 = NOT 0 = 1. After shift: Q2=1, Q1=1, Q0=0 → State: 110 — Q0 is still 0, so the new input is still 1. The 1s continue to fill from the left.
4. Current state: 110. New input = NOT Q0 = NOT 0 = 1. After shift: Q2=1, Q1=1, Q0=1 → State: 111 — All three stages are now 1. On the next pulse, Q0 = 1, so the new input flips to 0.
5. Current state: 111. New input = NOT Q0 = NOT 1 = 0. After shift: Q2=0, Q1=1, Q0=1 → State: 011 — The 0s now begin to fill from the left, mirroring the earlier fill of 1s.
6. State 011 → new input = NOT 1 = 0 → 001 State 001 → new input = NOT 1 = 0 → 000 (back to start) — The full sequence is: 000 → 100 → 110 → 111 → 011 → 001 → 000. That is 6 unique states, confirming $2n = 2 \times 3 = 6$.

Answer: The 3-stage Johnson counter passes through 6 unique states: 000, 100, 110, 111, 011, 001, then repeats. This confirms the formula: number of states = $2n = 2 \times 3 = 6$.

7. Exam Technique and Common Mistakes

Counter questions at A Level test three skills: recall of definitions, analysis of state sequences, and evaluation of counter choice. Each skill requires a slightly different approach, and examiners are very specific about what earns marks.

When a question asks you to describe a counter, give the sequence of states in order — do not just say it counts up. When asked to explain the operation, link each state change to the clock pulse and the feedback mechanism. When asked to compare two counter types, you must address both similarities and differences; a one-sided answer will not score full marks.

These three counter types — binary, BCD, and Johnson — cover the full AQA specification requirement for digital counters. The binary counter establishes the foundational $2^n$ counting principle; the BCD counter modifies it for decimal display applications by resetting at state 1010; and the Johnson counter replaces binary counting entirely with a shift-register feedback mechanism that produces $2n$ glitch-free states.